Electronics demand more integrated circuits in an integrated circuit package while paradoxically providing less physical space in the system for the increased integrated circuits content. Some technologies primarily focus on integrating more functions into each integrated circuit. Other technologies focus on stacking these integrated circuits into a single package. While these approaches provide more functions within an integrated circuit, they do not fully address the requirements for lower height, smaller space, and cost reduction.
Modern electronics, such as smart phones, personal digital assistants, location based services devices, servers, and storage arrays, are packing more integrated circuits into an ever shrinking physical space with expectations for decreasing cost. Numerous technologies have been developed to meet these requirements. Some of the research and development strategies focus on new package technologies while others focus on improving the existing package technologies. Research and development in the existing package technologies may take a myriad of different directions.
One proven way to reduce cost is to use package technologies with existing manufacturing methods and equipments. Paradoxically, the reuse of existing manufacturing processes does not typically result in the reduction of package dimensions. Existing packaging technologies struggle to cost effectively meet the ever demanding integration of today's integrated circuits and packages.
Numerous package approaches stack multiple integrated circuit dice or package in package (PIP) or a combination thereof. The electrical connections to the each of the stacked integrated circuit require space typically formed by spacers, such as silicon or interposers. Current spacers require additional steps and structures increasing manufacturing costs and decreasing manufacturing yields. These spacers also limit the amount of height reduction.
Thus, a need still remains for a stacked integrated circuit package system providing low cost manufacturing, improved yields, and reduce the integrated circuit package dimensions. In view of the ever-increasing need to save costs and improve efficiencies, it is more and more critical that answers be found to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.